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targets: aarch64: Add bare-metal aarch64 target #53233
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A generic AArch64 target that can be used for writing bare-metal code for 64-bit ARM architectures.
Thanks for the pull request, and welcome! The Rust team is excited to review your changes, and you should hear from @varkor (or someone else) soon. If any changes to this PR are deemed necessary, please add them as extra commits. This ensures that the reviewer can see what has changed since they last reviewed the code. Due to the way GitHub handles out-of-date commits, this should also make it reasonably obvious what issues have or haven't been addressed. Large or tricky changes may require several passes of review and changes. Please see the contribution instructions for more information. |
cc @japaric, does the naming here look ok to you? Otherwise all the technical changes here look good to me! |
@andre-richter does aarch64 also have two float ABIs: soft and hard? Or do all ARMv8 processors have a hardware FPU? If all processors are using the hard float ABI then the name seems fine; otherwise we should include the fourth field (abi) to be able to differentiate soft float from hard float. |
To my knowledge, AArch64 always has an FPU. |
Ok! In that case let's... @bors: r+ |
📌 Commit 898950c has been approved by |
Although, I think whatever you put in there is ignored by LLVM for AArch64 anyway. So nothing is should be fine but then again the other rust targets where ABI doesn't matter have "elf" but that's the object format not ABI so I don't know. |
I spent some thoughts on your questions as well before I started the PR. Regarding the object-format, I came to the same conclusion as you that it doesn't matter, because for bare-metal we pipe it through objcopy afterwards anyways. So we don't care what we get as intermediary result. I used lld because it worked fine for me, and is the more native and self-contained solution within the rust toolchain in my opinion. |
I would've thought most people will use this target for kernel development where they want to disable the FPU to avoid saving the FP registers on every context switch/syscall so perhaps add target feature |
Would it matter if you don't use float types/routines? And saving float regs Is not happening unless you do it by hand? Am I missing something? Could be added for safety, though, yes. |
Yes because the compiler can auto vectorize which will use fp/simd registers.
Yes. This target is valid as it is I'm just not sure which is a more useful target, one with FP or one without. Maybe add both ;). I guess most kernel devs will create their own target spec to suit, though. |
Thanks for the vectorization example, certainly haven't thought about that. Like described in the source code comments, the usage intent is anyways to use something like .cargo/config to further specialize by e.g. defining a specific cpu. Disabling fpu explicitly could be done in the same take ideally if wished. |
Unfortunately not because libcore won't be recompiled so the FPU usage would still be there plus you end up with an ABI mismatch between libcore and the rest of your code. |
Oh, will adding a target like that automatically ship with a precompiled core? No additional hooks needed? I thought we need xargo anyways to use it. Not using fp is definitely the more likely default case for this target. I will submit another patch to fix that. Too late to opt out now I guess. |
Presumably because LLD has good enough AArch64 support and
Some targets are named after the prefix of the canonical GCC toolchain (e.g.
No, this PR won't enable builds of rust-std. At the very least you'll have to add the target name to this file.
If there's a use case for forbidding the use of the FPU even though all processors have an FPU I would suggest adding two targets: |
Thanks @japaric for clearing stuff up. Let me reiterate what I wanted to achieve with this target.
This is good news to me because not getting core/std libraries shipped was my intention. If you write target-optimized (e.g. Now that I know that we need Xargo anyways, disabling FPU can be done by the user of the target without unintended side effects. Here's two examples of using the target as it is:
[target.aarch64-unknown-none]
rustflags = [
"-C", "link-arg=-Tlink.ld",
"-C", "target-feature=+a53,-fp-armv8",
]
I don't think it makes sense for us to assume every possible use-case and provide a target for that. There's just too many possibilities. But shipping a canonical starting point to people is fine imo. For these reasons, I would vote to leave the target exactly as is. You guys fine with that? |
Yeah I'm fine with that. |
targets: aarch64: Add bare-metal aarch64 target A generic AArch64 target that can be used for writing bare-metal code for 64-bit ARM architectures.
Is the plan is to use Xargo here and not make this target available on stable anytime soon then this approach sgtm. |
targets: aarch64: Add bare-metal aarch64 target A generic AArch64 target that can be used for writing bare-metal code for 64-bit ARM architectures.
targets: aarch64: Add bare-metal aarch64 target A generic AArch64 target that can be used for writing bare-metal code for 64-bit ARM architectures.
Rollup of 11 pull requests Successful merges: - #53112 (pretty print BTreeSet) - #53208 (Don't panic on std::env::vars() when env is null.) - #53226 (driver: set the syntax edition in phase 1) - #53229 (Make sure rlimit is only ever increased) - #53233 (targets: aarch64: Add bare-metal aarch64 target) - #53239 (rustc_codegen_llvm: Restore the closure env alloca hack for LLVM 5.) - #53246 (A few cleanups) - #53257 (Idiomatic improvements to IP method) - #53274 (Remove statics field from CodegenCx) - #53290 (Make LLVM emit assembly comments with -Z asm-comments) - #53317 (Mark prior failure to avoid ICE)
A generic AArch64 target that can be used for writing bare-metal code
for 64-bit ARM architectures.